1. Technical Field
The present invention relates to a semiconductor device which is particularly preferably applied to a three-dimensional integrated configuration.
2. Related Art
There has been a method in which a face-up mounted semiconductor chip is stacked on a face-down mounted semiconductor chip in a semiconductor device of related art in order to achieve high density packaging of the semiconductor chip.
For example, disclosed in an example of related art is a method for forming a conductor film on a rear surface of a second semiconductor chip mounted on a first semiconductor chip in order to restrain interference between the stacked semiconductor chips caused by noise.
Japanese Patent No. 3,681,690 is the example of related art.
However, in a stacked structure of the semiconductor chips of related art, the interference occurs between the stacked semiconductor chips caused by noise, disadvantageously leading to reduced reliability of the semiconductor device. Further, in the method disclosed in the example of related art, the conductor film needs to be formed on the rear surface of the second semiconductor chip mounted on the first semiconductor chip, disadvantageously leading to a complicated manufacturing process of the second semiconductor chip.